By Ken Gilleo
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Extra resources for Area Array Packaging Handbook: Manufacturing and Assembly
A typical design is more or less that of a small box that is open at the top and finally sealed with a lid. The electronics is sealed within, and electrical leads exit by means of insulators that maintain gas-barrier properties. Alternately, an insulative base made of ceramic can be used to solve the electrical isolation issue. 8 shows metal hermetic packages. 2 Ceramic Ceramic material has long been used because of excellent barrier properties, good thermal conductivity, and good electrical isolation.
Rigid Carriers. Rigid carriers are the most common types of plastic package platform. The carrier is basically a miniature PWB that provides the chip mounting platforms and the wiring interconnect structure. FR4 has been used, but higher-performance organic laminates such as bismaleimide-triazine (BT) have become common. BT and other advanced laminates have more thermomechanical stability and heat resistance. The chip carrier is heated four or more times during its life: die attach, chip interconnect, solder ball attachment, and assembly to board.
Thermal management may not even be useful for a low-power memory chip but a critical requirement for a powerful central processing unit (CPU). 10 m or 1 ϫ 10Ϫ7 m, or about 1/10,000 in. 1 m (100 nm). While the prefix micro- means one-millionth (of a meter), the prefix nano- means one-billionth (1 ϫ 10Ϫ9 m). The printed circuit industry generally considers fine line to be about 3 to 4 mils (75 to 100 m). There is nearly a 1000-fold feature size disparity between the two industries and their products.
Area Array Packaging Handbook: Manufacturing and Assembly by Ken Gilleo